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Renesas Electronics /R7FA6M3AH /GLCDC /SYSCNT_INTEN

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Interpret as SYSCNT_INTEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)VPOSINTEN 0 (0)L1UNDFINTEN 0 (0)L2UNDFINTEN

L1UNDFINTEN=0, L2UNDFINTEN=0, VPOSINTEN=0

Description

System Control Block Interrupt Request Enable Control Register

Fields

VPOSINTEN

Interrupt request signal GLCDC_VPOS enable control.

0 (0): Disables GLCDC_VPOS output

1 (1): Enables GLCDC_VPOS output
L1UNDFINTEN

Interrupt request signal GLCDC_L1UNDF enable control.

0 (0): Disables GLCDC_L1UNDF output

1 (1): Enables GLCDC_L1UNDF output
L2UNDFINTEN

Interrupt request signal GLCDC_L2UNDF enable control.

0 (0): Disables GLCDC_L2UNDF output

1 (1): Enables GLCDC_L2UNDF output

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data